In the production of semiconductor integrated circuits and other semiconductor articles from semiconductor wafers, it is often necessary to provide multiple metal layers on the wafer to serve as interconnect metallization which electrically connects the various devices on the integrated circuit to one another. Traditionally, aluminum has been used for such interconnects, however, it is now recognized that copper metallization may be preferable.
The application of copper onto semiconductor wafers has, in particular, proven to be a great technical challenge. At this time copper metallization has not fully achieved commercial reality due to practical problems of forming copper layers on semiconductor devices in a reliable and cost efficient manner.
The industry has sought to plate copper onto a semiconductor wafer by using a damascene electroplating process where holes, more commonly called vias, trenches and other recesses are used in which the pattern of copper is desired. In the damascene process, the wafer is first provided with a metallic seed layer which is used to conduct electrical current during a subsequent metal electroplating step. The seed layer is a very thin layer of metal which can be applied using one or more of several processes. For example, the seed layer of metal can be laid down using physical vapor deposition or chemical vapor deposition processes to produce a layer on the order of 1000 angstroms thick. The seed layer can advantageously be formed of copper, gold, nickel, palladium, and most or all other metals. The seed layer is formed over a surface which is convoluted by the presence of the vias, trenches, or other device features which are recessed.
In damascene processes, the copper layer that is electroplated onto the seed layer is in the form of a blanket layer. The blanket layer is plated to an extent which forms an overlying layer, with the goal of completely providing a copper layer that fills the trenches and vias and extends a certain amount above these features. Such a blanket layer will typically be formed in thicknesses on the order of 10,000-15,000 angstroms (1-1.5 microns).
After the blanket layer has been electroplated onto the semiconductor wafer, excess metal material present outside of the vias, trenches or other recesses is removed. The metal is removed to provide a resulting patterned metal layer in the semiconductor integrated circuit being formed. The excess plated material can be removed, for example, using chemical mechanical planarization. Chemical mechanical planarization is a processing step which uses the combined action of a chemical removal agent and an abrasive which grind and polish the exposed metal surface to remove undesired parts of the metal layer applied in the electroplating step.
Automation of the copper electroplating process has been elusive, and there is a need in the art for improved semiconductor plating systems which can produce copper layers upon semiconductor articles which are uniform and can be produced in an efficient and cost-effective manner. More particularly, there is a substantial need to provide a copper plating system that is effectively and reliably automated.
In the electroplating of semiconductor wafers, an anode electrode is disposed in a plating bath and the wafer with the seed layer thereon is used as a cathode with the face of the wafer that is to be plated contacting an upper surface of the plating bath. The semiconductor wafer is held by a support system that also provides be requisite cathode potential to the wafer. The support system may comprise conductive fingers that secure the wafer in place and also contact the wafer in order to conduct electrical current for the plating operation.
During the electroplating process, the conductive fingers as well as be semiconductor wafer are plated with the plating metal, such as copper. One potential problem that occurs in such a process is the build up of plating metal deposits on the conductive finger. These deposits may: 1) result in unintended attachment of the conductive finger while in contact with the wafer such that upon disengagement of the conductive finger with the wafer surface, some of the plated surface may tear away and fall off as particles; 2) introduce variability in the current being conducted through the contact and ultimately across the plated surface; and 3) result in small particles breaking off of the deposits on the conductive finger or off of the wafer which may enter the plating bath, and ultimately lodge directly on the wafer surface during plating or contaminate subsequently plated wafers. These effects may each independently or in combination create irregularities in the plated surface or result in other defects in the wafer. Additionally, these effects may also contribute to reduced wafer to wafer uniformity.
One manner in which the plating may be removed from the electrode fingers is to manually remove the conductive electrode fingers for cleaning when a specified level of plating or deposits has built-up on the finger contact surface. This is undesirable, however, because it causes significant down time in the electroplating processing, particularly in continuous wafer plating operations. Significant loss of wafer throughput and higher processing costs are associated with this course of action. It would be more desirable to develop a method for cleaning the deposits off of the electrode and segregating the resulting particles from the plating process while at the same time minimizing the downtime of the production process.